bd4bfe1387
[Detail] Hybrid encoder would use /proc/m4u device that we have to enable its access permission. MTK-Commit-Id: ba554f2ef0c5e78a7f9df483453b04630c557391 Change-Id: I93d40947a40da9d17d63cb0ad79519837b64e643 CR-Id: ALPS04807382 Feature: H.264 Encoder
71 lines
2.3 KiB
Plaintext
Executable File
71 lines
2.3 KiB
Plaintext
Executable File
#####################################
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# ged_bridge_id.h
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#
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define(`GED_BRIDGE_IO_LOG_BUF_GET', `0x6700')
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define(`GED_BRIDGE_IO_LOG_BUF_WRITE', `0x6701')
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define(`GED_BRIDGE_IO_LOG_BUF_RESET', `0x6702')
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define(`GED_BRIDGE_IO_BOOST_GPU_FREQ', `0x6703')
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define(`GED_BRIDGE_IO_MONITOR_3D_FENCE', `0x6704')
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define(`GED_BRIDGE_IO_QUERY_INFO', `0x6705')
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define(`GED_BRIDGE_IO_NOTIFY_VSYNC', `0x6706')
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define(`GED_BRIDGE_IO_DVFS_PROBE', `0x6707')
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define(`GED_BRIDGE_IO_DVFS_UM_RETURN', `0x6708')
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define(`GED_BRIDGE_IO_EVENT_NOTIFY', `0x6709')
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define(`GED_BRIDGE_IO_WAIT_HW_VSYNC', `0x670a')
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define(`GED_BRIDGE_IO_QUERY_TARGET_FPS', `0x670b')
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define(`GED_BRIDGE_IO_VSYNC_WAIT', `0x670c')
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define(`GED_BRIDGE_IO_GPU_HINT_TO_CPU', `0x670d')
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define(`GED_BRIDGE_IO_HINT_FORCE_MDP', `0x670e')
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define(`GED_BRIDGE_IO_GE_ALLOC', `0x6764')
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define(`GED_BRIDGE_IO_GE_GET', `0x6765')
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define(`GED_BRIDGE_IO_GE_SET', `0x6766')
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define(`GED_BRIDGE_IO_GPU_TIMESTAMP', `0x6767')
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define(`GED_BRIDGE_IO_TARGET_FPS', `0x6768')
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define(`GED_BRIDGE_IO_GE_INFO', `0x6769')
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define(`GED_BRIDGE_IO_GPU_TUNER_STATUS', `0x676a')
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#####################################
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# perf_ioctl.h : FPSGO
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#
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define(`PERFMGR_FPSGO_QUEUE', `0x6701')
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define(`PERFMGR_FPSGO_DEQUEUE', `0x6703')
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define(`PERFMGR_FPSGO_VSYNC', `0x6705')
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define(`PERFMGR_FPSGO_TOUCH', `0x670a')
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define(`PERFMGR_FPSGO_QUEUE_CONNECT', `0x670f')
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define(`PERFMGR_FPSGO_BQID', `0x6710')
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# perf_ioctl.h : EARA
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define(`PERFMGR_EARA_NN_BEGIN', `0x6701')
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define(`PERFMGR_EARA_NN_END', `0x6702')
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define(`PERFMGR_EARA_GETUSAGE', `0x6703')
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# perf_ioctl.h : others
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define(`PERFMGR_CPU_PREFER', `0x6701')
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#####################################
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#
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#
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define(`MMC_IOCTLCMD', `0xb300')
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define(`MMC_IOC_MULTI_CMD', `0xb301')
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define(`UFS_IOCTLCMD', `0x5388')
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define(`UFS_IOCTL_RPMB', `0x5391')
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#####################################
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#
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#
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define(`JPG_BRIDGE_ENC_IO_INIT', `0x780b')
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define(`JPG_BRIDGE_ENC_IO_CONFIG', `0x780c')
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define(`JPG_BRIDGE_ENC_IO_WAIT', `0x780d')
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define(`JPG_BRIDGE_ENC_IO_DEINIT', `0x780e')
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define(`JPG_BRIDGE_ENC_IO_START', `0x780f')
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#####################################
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# m4u_priv.h
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define(`MTK_M4U_T_ALLOC_MVA', `0x6704')
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define(`MTK_M4U_T_DEALLOC_MVA', `0x6705')
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define(`MTK_M4U_T_CONFIG_PORT', `0x670b')
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define(`MTK_M4U_T_DMA_OP', `0x671d')
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define(`MTK_M4U_T_SEC_INIT', `0x6732')
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define(`MTK_M4U_T_CONFIG_PORT_ARRAY', `0x671a')
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define(`MTK_M4U_T_CACHE_SYNC', `0x670a')
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